SI1300DL
v ds (v) r ds(on) ( ) i d (ma) 20 2.0 @ v gs = 4.5 v 250 20 2.5 @ v gs = 2.5 v 150 sot-323 sc-70 (3-leads) s d 1 2 3 g marking code kc xx lot traceability and date code part # code yy
parameter symbol limit unit drain-source voltage v ds 20 v gate-source voltage v gs 8 v continuous drain current ( t j = 150 c ) a t a = 25 c i d 250 a continuous drain current (t j = 150 c) a t a = 70 c i d 200 ma pulsed drain current i dm 500 maximum power dissipation a t a = 25 c p d 0.15 w maximum power dissipation a t a = 70 c p d 0.10 w operating junction and storage temperature range t j , t stg 55 to 150 c
parameter symbol limit unit maximum junction-to-ambient a r thja 833 c/w notes a. surface mounted on fr4 board, t 10 sec. 1 of 2 4008-318-123 sales@twtysemi.com http://www.twtysemi.com product specification
parameter symbol test condition min typ max unit static drain-source breakdown voltage v (br)dss v ds = 0 v, i d = 10 a 20 24 v gate-threshold voltage v gs(th) v ds = v gs , i d = 50 a 0.4 0.9 1.5 v gate-body leakage i gss v ds = 0 v, v gs = 8 v 2 100 na zero gate voltage drain current i dss v ds = 20 v, v gs = 0 v 0.001 100 na zero gate v oltage drain current i dss v ds = 20 v, v gs = 0 v, t j = 55 c 5 a on - state drain current a i d(on) v ds = 5.0 v, v gs = 2.5 v 120 160 ma on - state drain current a i d(on) v ds = 8.0 v, v gs = 4.5 v 400 800 ma drain-source on-state resistance a r ds(on) v gs = 2.5 v, i d = 150 ma 1.6 2.5 drain - source on - state resistance a r ds( on ) v gs = 4.5 v, i d = 250 ma 1.2 2.0 forward transconductance a g fs v ds = 2.5 v, i d = 50 ma 200 ms diode forward voltage a v sd i s = 50 ma, v gs = 0 v 0.7 1.2 v dynamic total gate charge q g v 5 0 v v 4 5 v i 100 a 350 450 c gate-source charge q gs v ds = 5.0 v, v gs = 4.5 v, i d = 100 ma 25 pc gate-drain charge q gd 100 input capacitance c iss v50vv0vf1mh 20 f output capacitance c oss v ds = 5.0 v, v gs = 0 v, f = 1 mhz 14 pf reverse transfer capacitance c rss 5 switching b, c turn-on delay time t d(on) v 3 0 v r 100 7 12 rise time t r v dd = 3.0 v, r l = 100 i 0 25 a v 4 5 v r 10 25 35 ns turn-off delay time t d(off) dd , l i d = 0.25 a, v gen = 4.5 v, r g = 10 19 30 ns fall time t f 9 15 notes a. pulse test; pulse width 300 s, duty cycle 2%. b. for design only, not subject to production testing. c. switching time is essentially independent of operating temperature. SI1300DL product specification 2 of 2 4008-318-123 sales@twtysemi.com http://www.twtysemi.com
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